1. Field of the Invention
The present invention relates to an electrically rewritable nonvolatile semiconductor storage device (EEPROM) and more particularly to an EEPROM that achieves higher reliability of a specific area.
2. Description of the Related Art
As a type of EEPROM, NAND-type flash memory is known. In NAND flash memory, normally, a block with a specific address needs to be guaranteed as a valid block (a block that is not bad or not defective). An example of such a block includes a controller block that holds control data of a memory controller.
NAND flash memory is nonvolatile memory and accomplishes a reduction in cost of a controller by storing a part of control data used by the controller, in a specific block of the NAND flash memory. If, when the controller block is bad (defective), the memory chip is considered to be a bad chip, the product yield decreases. In the following, among a plurality of blocks, a specific block that should be particularly guaranteed to be valid as described above is referred to as a “guaranteed block”.
In NAND-type flash memory, among all blocks, a certain number or less of bad blocks are allowed, whereby the yield is increased. That is, the number of blocks is determined by the number of blocks corresponding to capacity guaranteed to users and the number of allowed bad blocks.
Typical methods for dealing with a bad block occurred include the following (1) and (2).
(1) Block redundancy scheme (see, for example, Japanese Patent Application Laid-Open No. 2007-179594)
In this scheme, redundant blocks are provided separately from power-of-two user blocks. Upon product-test prior to shipping, when there is a bad user block, the block is replaced by a redundant block. Specifically, in a redundancy remedy for certain bad user block, an access to an address of the user block is actually processed as an access to a corresponding redundant block for replacement.
In such a bad address replacement control, a user recognizes, at all times, only the power-of-two blocks. The users cannot directly access the redundant blocks.
In this scheme, when the number of allowed bad blocks is smaller than the number of redundant blocks, i.e., when there are vacant redundant blocks, replacement is performed every time a bad block is detected. As for a bad block detected after there are no more vacant redundant blocks left, a bad block process is performed by merely setting a bad block flag within a row decoder without any replacement of the blocks.
In the case of this scheme, a guaranteed block may be given priority for undergoing a test. Then, if the guaranteed block is bad, a redundancy remedy is performed on the block. This allows the guaranteed block to be substantially secured as a good block.
However, in this scheme, increasing the number of redundant blocks not only increases an area occupied by the redundant blocks, but also requires a register that holds bad block addresses and an address replacement circuit, resulting in a large increase in area. Thus, when the chip area needs to be reduced as much as possible, this scheme is disadvantageous. Also, this scheme requires complex replacement control.
(2) Extended block scheme (see, for example, Japanese Patent Application Laid-Open No. 2005-216345)
In this scheme, instead of redundant blocks, a plurality of additional blocks are provided in addition to power-of-two user blocks. A required number of additional blocks is calculated from the number of blocks corresponding to capacity guaranteed to users, the rate of occurrence of bad user blocks, etc. These blocks are all user accessible areas. Note, however, that since the total number of blocks is not power of two, there are empty block addresses (blank addresses).
Also in this scheme, when a bad block is detected upon product-test prior to shipping, a bad block process is performed by setting a bad block flag within a row decoder.
The advantage of this scheme is explained as follows. Specifically, as long as blank addresses are properly under control, increase in the number of blocks does not cause increase in area except for an increase in area for added blocks. Also, control therefor is easier than the block redundancy scheme.
This scheme is more effective under circumstances where a cell array is well miniaturized, thus the number of blocks per chip is increased, and the number of allowable bad blocks is also increased.
In this scheme, however, when a guaranteed block is bad and is not remedied, the chip have to be treated as a bad chip, lowering the product yield.